The VDOTX architecture.
Hardware and toolchain co-designed for local inference. Routed through a ternary crossbar fabric, compiled hardware-aware, measured under real workloads.
Compute fabric
- Ternary crossbar core, multi-precision routing
- Performance per watt measured during validation
- Built for strict embedded power envelopes
Silicon IP
- Patent-focused routing and crossbar topology
- Predictable inference-path design target
- Planned integration blocks for silicon partners
Compiler stack
- Hardware-aware execution compilation
- Planned quantisation across supported precisions
- Target: standard model formats in, optimized graph out
The machines this is for.
Autonomous robotics
Drones, cobots, and delivery platforms that benefit from local, low-latency inference without a mandatory cloud round-trip.
In-camera inference
Process video near the lens and transmit selected metadata instead of continuous raw footage, reducing network load and limiting unnecessary data movement.
Industrial control
Low-latency anomaly detection and control support on the factory floor, including systems that must continue operating with limited connectivity.
Defense and aerospace
Potential offline sensor processing and telemetry workloads within strict size, weight, power, and cost constraints. Any deployment would require program-specific qualification and compliance.